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Zynq-7000 AP SoC Isolation Design Flow Lab

Zynq-7000 AP SoC Isolation Design Flow Lab

This lab application note describes the creation and implementation of a single chip cryptography (SCC) system using redundant Keccak hash modules with compare logic. Complete step-by-step instructions are given for the entire process, explaining the use of the Isolation Design Flow (IDF). This document explains how to implement isolated functions in a single Xilinx® Zynq®-7000 All Programmable SoC device for the example SCC solution. Even though this application note explains how to implement a design using the IDF for a Zynq-7000 device, the same process can be used to implement an IDF design using any 7 series FPGA device.


With this application note, designers can develop a fail-safe single chip solution using the Xilinx IDF that meets fail-safe and physical security requirements for an example high-assurance application.