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Reverse engineering the popular 555 timer chip (CMOS version)

Reverse engineering the popular 555 timer chip (CMOS version)

The 555 schematic interactive explorer

The 555 die photo and schematic
below are interactive. Click on a component in the die or schematic, and a brief explanation of the component will be displayed.
(For a thorough discussion of how the 555 timer works, see
555 Principles of Operation.)

For a quick overview,
the large output transistors and discharge transistor are distinguishable by their zig-zag gate pattern. The current mirror transistors are generally large.
The threshold comparator consists of Q1 through Q5. The trigger comparator consists of Q13 through Q18.
Q19 through Q29 form the flip flop circuit. The voltage divider resistors are in the upper center of the chip.[8]

I created the above schematic by reverse-engineering the chip, so I don’t guarantee full correctness. A PDF of my schematic is here

and a differently-formatted version is here.
The schematic of a different CMOS 555 is here, and it’s interesting to compare the differences.
While the comparators are the same, the current mirrors are built differently, and the flip flop circuit is very different.

CMOS 555 compared with traditional bipolar 555

The regular 555 timer was designed in 1970, while a CMOS version
(the ICM7555) wasn’t released until 1978.
The LMC555 described in this article came out around 1988, while the die itself has a date of 1996.


The image below compares the classic 555 timer (left) with the CMOS LMC555 (right), both to the same scale.
While the bipolar chip is constructed from silicon connected by a metal layer, the CMOS chip has an additional interconnect layer of polysilicon, which makes the chip more complex to understand visually.
The CMOS chip is smaller. In addition, the CMOS chip has a lot of wasted space in the bottom and upper right, so it could have been made even smaller.
The CMOS transistors are much more complex than the bipolar transistors. Except for the output transistors, the bipolar transistors are all simple individual units. Most of the CMOS transistors in comparison are built from two or more transistors in parallel.
The classic 555 uses many more resistors than the CMOS 555; 16 versus 4.

Die photos of the 555 timer (left) and CMOS 555 timer (right), to the same scale.

Die photos of the 555 timer (left) and CMOS 555 timer (right), to the same scale.

You can see from the photo that the features are smaller in the CMOS chip.
The smallest lines in the regular 555 are 10-15µm,
while the CMOS chip has 6µm features.
Advanced chips in 1996 used the
350nm process (about 17 times smaller), so the LMC555 was nowhere near the cutting edge of CMOS technology.

Comparing these chips illustrates the power consumption benefits of CMOS.
The standard 555 timer typically uses 3 mA of current, while this CMOS version only uses 100µA (and other versions use below 5µA).
An input to the 555 can draw .5µA, while an input to the CMOS version
uses an incredibly small 10pA, more than four orders of magnitude smaller.
The smaller input “leakage” currents permit much longer delays with the CMOS chips.[9]

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