Vasily Ivanenko prepares this Lab Notes from Transistor Radios
I like making simple component-level radios. This Fall, I rekindled my love for making transistor radios and hope to slowly blog some circuits and fun. I’m warning you now — these circuits hearken the 1970s and 80s, SSD, EMRFD, old issues of Ham Radio and other stuff that require no coding skills.
For the Ham 40 meter band, I thought about employing an Si5351 for the synthesizer — naw. While this chip poses a great choice, I wanted something a little more organic. If you go the Si5351 route, I recommend you consider the offerings by EtherKit. Jason toiled to improve the Arduino code library for this and perhaps you might support his future efforts? Above — Block diagram. This topology borrows from the concepts of Wes, W7ZOI.
Above —PLL Board Schematic. I built this whole project employing Ugly Construction.
Above — Reference oscillator output. I built the 2 MHz crystal reference oscillator in a familiar Pierce circuit with an 74HC14. This hex inverter with Schmitt-trigger inputs makes a fabulous reference oscillator as seen above.
Above — DSO tracing of the 2 MHz reference divided by 13 in the 74HC193 4-bit synchronous counter.
The internal 4-bit WORD gets programmed by pins 9, 10,1 and 15. By default, all 4 pins are set HIGH. Three N-channel MOSFETs locally switch the appropriate pins to ground according to a front panel 5-position switch. This avoids the usual 4 toggle switches you might otherwise use.
For divide by 12, two steering diodes get employed without the 2K2 current-limiting resistors seen on the other switch positions. Each diodes’ forward voltage drop limits the MOSFET gate drive current to ~ 1 mA which is about the current limit offered by the 2K2 resistor in the other switch positions.
The output of the 4-bit counter goes to Pin 3 of a phase-frequency detector built with a pair of 74HC74s. The other 74HC74 clock input (Pin 11) is driven by a 74HC00 buffer which takes the low frequency, sine wave output of the offset mixer and squares it to proper CMOS voltage levels.
Above — The 74HC00 signal squarer in my DSO when tested with a 7.04 MHz signal generator.
With no AC input signal, a CMOS squarer may oscillate somewhere between between ~2 and 70 MHz. My 5 volt 74HC00 DC supply is bypassed from AF to HF and the signal path input is also decoupled and bypassed with the 51 Ω / 470pF network.
For the PLL board, it’s literally test as you go. For example, build the 2 MHz Pierce oscillator and look at its output. Then use that output to test the 4-bit counter. Any old bench sine wave oscillator from AF to HF will test the 74HC00 squarer. For the 2 remaining NAND gates: Ground the input pins of one gate while using the other gate to reset pins 1 and 13 in your phase/frequency detector.
I stuck with the classic, low-noise, OP-27 for the loop filter. You’ll find the OP-27 in PLL circuits published decades ago. While we enjoy lower noise op-amps today, I got them for low cost long ago and they impart some nostalgia on my bench — and the OP-27 is still a great part.
Since the VCO operates over a very narrow bandwidth [ hopefully 7.00 – 7.065 MHz ], you can filter the loop well. The 1K2 loop dampening resistor posed critical, so I employed a 1% part in that slot. The critical dampening resistance value in my loop was ~ 1170 to 1188 Ω. If I went below that resistance, the feedback loop goes into spasm and oscillates. A 5% 1K2 resistor might not cut it! Hence, a 1K5 Ω 5% part might be a better choice if you don’t have a 1% 1K2 Ω resistor in stock.
For the op-amp filter, two, small, 63v, polyester 1 µF caps were placed in parallel since I lacked a 2.2 µF capacitor.
The filter allows the PLL to locks quickly and filters well. The output of the main VCO looks good for a home brew PLL system.
— The main VCO channel output (with some external attenuation) into my spectrum analyzer. I could not see any reference oscillator spikes in the output. Yay! Basically, we’re seeing the noise of my SA.