have created and implemented a basic counter module so that we can blink few leds. now we will verify that counter module with the help of a test-bench module and Altera ModelSim Software, there are many software which you can you to simulate your design none of the component we use are platform dependent.
so lets start , first of all we are going to need a testbench module , testbench module is nothing but a simple verilog module which feeds the inputs to our counter module , monitor the output and ultimately validates that the under test module is working as it should be, to achieve this testbench modules have few extra features or you can call them have extra powers , like you can specify initialization block and specify time when a instruction will execute due to testbench module never ever get synthesize , they just run in the simulation software that is all.
lets start writing a test bench ,
|`timescale 1ns/1ps // simmulation happen in picosecond time base , |
// we have up scaled it it to ns
// when we say #5 it will mean 5 ns , and when we say #1000 it will 1000ns, 1us
reg clock_tb,reset; //mapped with ports of the module under test
always #5 clock_tb=~clock_tb; //generate clock by toggling Clock line ever 5 unit of time