ISE compiled the design with no fuss and I had a bistream waiting for me to upload into the FPGA. I connected power to the board through the USB connector and then hooked up the platform USB cable. After redirecting the USB device to the XP virtual machine a green LED appeared on the programmer’s front panel. That must a good thing, green is always good. Xilinx Impact is the program used to talk JTAG to the FPGA so I fired it up and created a new ‘project’ based around the .bit file generated by ISE.
It worked! I was massively relieved and pleased to see that the FPGA was recognised by Impact as the correct device type which means that it was definitely alive. Well, at least the JTAG pins were alive and well. Without further ado I hit the Program button to see what would happen.
Wahey! It’s working! Yes, of course it took a few iterations around the develop/compile/test cycle to get the timings right but there it was, working perfectly.
Never has blinkenled meant so much
Now I know that the FPGA core and IOs are fine. The JTAG interface, the oscillator and at least the I/Os that I’ve tested are all good. I’ll just stare at these LEDs for a few minutes if you don’t mind and then I’ll go put the rest of the board together.
