6. Component Placement
Component placement is one of the most critical stages of PCB layout design. Depending on how efficiently the component placement is done, the trace routing will be that much easier. In general the component placement is based on electrical function, thermal management and electrical noise considerations.
There are two units generally used for PCB design – Imperial and Metric. The Imperial units are more popular among the PCB designers but currently the metric units are becoming the defacto standard in the PCB industry. Begin by making a PCB floor plan and decide which group of components will occupy which areas of the board. Following are the generic guidelines for effective and efficient component placement:
- Begin by placing the critical components like Microprocessor/Microcontroller, clock circuit, DDR memory etc., and the fixed position components like connectors, LEDs, LCD display etc.
- Use a grid of 100 or 50 mils for placing the critical components and a 25 mil grid for placing the other components
- Segregate the Analog, Digital and Power supply circuit components and isolate them from each other
- Place the clock and other high speed circuitry as far away from the I/O circuit as possible.
- As far as possible, place all components on a single side. If absolutely unavoidable, place the low profile passive components on the bottom side
- Place the following in close proximity
- Decoupling capacitors to the power pins.
- Series termination resistors to the source pins
- EMI filters to signal entry point
- Orient the components in a similar fashion during placement for ease of assembly
- Do not place component legends on pads
7. Routing
With the component placement complete, it is now time to route the traces. Traces on a PCB can be power/ground traces or signal traces. Further, signal traces can be analog or digital.
We begin by designing the layer stack. For the current high speed designs, the minimum number of layers is 4. Two signal layers, a power plane and ground plane. Having a power plane and ground plane not only ensures efficient routing of the signal traces, but also good EMI-EMC compliance. Having an unbroken return path underneath every high speed trace ensures that there are no ground loops, which are one of the major reasons for emissions. As a rule of thumb, a 4 layer board will produce 15dB less emissions than a two layer board.
Quoting from “EMC and Printed Circuit Board” by Mark I Montrose – “When clock speeds are in excess of 5MHz or rise times are faster than 5ns, a multilayer board should be used”.
Traces on a multilayer board with at least one power and ground plane can be routed in a micro strip or a stripline configuration.
While designing a layer stackup, the following factors are to be considered:
- A signal layer should be adjacent to an internal plane layer
- The signal layer and the adjacent plane layer should be tightly coupled: use minimum thickness of dielectric between these layers
- The power plane and ground plane should be closely coupled. The thickness of the dielectric between the planes should be minimum. Thus the two planes combined with the dielectric will act as a large embedded capacitance.
- The layer stackup is symmetrical
- Multiple ground planes will reduce the ground impedance of the PCB and hence reduce common mode radiation.
Generic guidelines for track routing is given below:
- Minimum track width and clearance can be arrived upon after confirmation with the fab house. It is recommended to have a minimum track width and clearance of 8 mils for low to medium complexity PCBs. High current trace width needs to be calculated based on the maximum current and expected temperature rise.
- Route the high speed signals and power and ground connections first, followed by the remaining connections.
- Route the clock circuit with as short traces as possible.
- Avoid running high speed traces in parallel as this will introduce crosstalk
- On a multilayer board, the power and ground connections are to be made to the planes using short traces from the pins of the components. Thermal reliefs are to be used to make the connection to the plane. Follow the 20H rule for power and ground planes wherein the power plane is recessed from the edge of the board by a distance equal to 20 times the thickness of the dielectric between the two planes.
- The 3W rule states that in order to avoid cross-talk between signals, the distance between the traces should be equal to or greater than 3 times the width of the trace.
- Avoid creating discontinuities in the ground plane. This would increase the loop area.
- In a mixed signal board, split the ground plane into analog and digital grounds and route the corresponding signals over the respective planes.
- Track bends should be made at 45° and never at 90°.
- If traces are to cross each other, they should do so at 90°, so as to minimize mutual capacitance and inductance.
- Use impedance controlled traces wherever necessary
- Minimize the use of vias, since vias add inductance to the traces.
- All high speed traces whose propagation time is greater than or equal to the signal rise/fall times should be terminated using series resistance
To make the critical calculations such as trace width, differential routing parameters, cross-talk etc., there are many free PCB design tools available which could be used. Some of the freely available tools are Saturn PCB design toolkit and AppCAD.
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Design Rules Checking (DRC), Gerber file generation and EMC Compliance – Best practices
