after entering the module code you need to implement the module and see if it happen successfully , if any error or very serious warning are there then you need to rectify them. to implement right click on the source file , and hit implement top module.
if implementation happen successfully then you have add pin mapping file , this file specify which pin of FPGA is connected to which port of the module, you have to add new source and , select Implementation Constants file. it will be .ucf file. you can automatically create this file with Xilinx pin planner , plan ahead , but for the sake of simplicity lets keep it manual.
