What’s inside a TTL chip?
To find out, I opened up a 74181 ALU chip,
took high-resolution die photos, and reverse-engineered the chip.1
Inside I found several types of gates, implemented with interesting circuitry and unusual transistors.
The 74181 was a popular chip in the 1970s used to perform calculations in the arithmetic-logic unit (ALU) of minicomputers.
It is a moderately complex chip containing about 67 gates and 170 transistors3, implemented using fast and popular TTL (transistor-transistor logic) circuitry.
The 74181 die photo is below. (Click the image for a high-resolution version.)
The golden stripes are the metal layer that interconnects the circuitry of the chip. (It’s not gold, just aluminum that looks golden from the lighting.)
The white squares around the edge of the die are the pads that are connected by tiny bond wires to the external pins.
Under the metal layer is the silicon that makes up the chip. Faint lines show the doped silicon regions that make up the transistors and resistors.
While the chip may appear impossibly complex at first, with careful examination it is possible to understand how it works.
The 74181 chip is important because of its key role in minicomputer history.
Before the microprocessor era, minicomputers built their processors from boards of individual chips.
The arithmetic operations (addition, subtraction) and logical operations (AND, OR, XOR) were performed by the arithmetic/logic unit (ALU) in the processor.
Early minicomputers built ALUs out of a large number of simple gates.
But in March 1970, Texas Instruments introduced the 74181 Arithmetic / Logic Unit (ALU) chip, which put a full 4-bit ALU on one fast TTL chip.4
This chip provided 32 arithmetic5 and logic functions2, as well as fast carry lookahead.7
Using the 74181 chip simplified the design of a minicomputer processor and made it more compact, so it was used in many minicomputers.
Computers using the 74181 ranged from the popular PDP-11 and NOVA minicomputers to the powerful VAX-11/780 to the Datapoint 2200 desktop computer.
The 74181 is still used today in retro hacker projects.6
The 74181 is built from bipolar NPN transistors, a different technology from the MOS transistors in modern processors.
The diagram below shows how an NPN transistor appears in an integrated circuit, along with a cross section.
The transistor has three connections: the collector, base and emitter, with metal lines for each.
The collector is connected to N-type silicon, the base to P silicon, and the emitter to N silicon (giving it the NPN structure).
On the chip, you can recognize the emitter from its nested squares, the base because its silicon region surrounds the emitter, and the collector because it is the largest contact.
The key idea of the NPN transistor is it acts as a switch between the collector and emitter, controlled by the base.
Normally there is no current flow between the collector and the emitter, so it’s like a switch in the “off” position.
But if you pass a small current from base to emitter, the transistor allows a large current from collector to emitter, like a switch in the “on” position.
(This is vastly oversimplified—bipolar transistors are much more “analog”—but should be enough to understand how the 74181 works.)
At the right is the symbol for an NPN transistor with the collector, base and emitter labeled.
The fundamental component of TTL logic is the inverter, and other gates are modifications of the inverter circuit.
Thus, it’s important to understand the basic construction of the inverter, even though it is a bit complicated.
I’ll explain how it works in an oversimplified way.9
The diagram below shows an inverter in the 74181 chip.
The 5V and ground lines run vertically along the left, powering the inverter.
The transistors are highlighted with boxes. The resistors are visible as long strips of doped silicon snaking around.11
An input pin (A0) is wired to the pad.
On the right is the schematic for a TTL inverter10, with components highlighted to match the die photo.
The input is connected to transistor Q1 (red).
This transistor is used in an unusual way, acting as a “current-steering” transistor.
If the input is low, R1’s current is steered through Q1’s emitter to the input, leaving Q2 off.
If the input is high, R1’s current flows “backwards” out Q1’s collector to Q2’s base, turning on Q2.
Transistor Q2 (orange) can be considered a “phase splitter transistor”, which makes sure that exactly one of the output transistors (Q3 and Q4) is activated. (That is, they turn on in opposite phases.)
If Q2 is off, R2 provides current to turn on Q3 (yellow), which pulls the output high. Meanwhile, R3 turns off Q4.
On the other hand, if Q2 turns on, it provides enough current to turn on Q4 (green), which pulls the output low.
I’ll explain the diodes in a footnote.12
The schematic below13 shows the circuitry of the 74181.
If you’ve taken a digital logic course, you’ve probably seen how to build a full adder circuit.
But if you look at the schematic of the 74181, it’s implemented in a very different way, to provide higher speed and more flexibility.8
The main reason for its complexity is it computes everything in parallel, rather than waiting for the carry to ripple from bit to bit, and this requires a lot more logic.
The different types of gates are highlighted. There are a few inverters (red) to invert input signals.
Most of the logic consists of AND-OR-INVERT gates. The AND stages are shown in blue, and the OR-INVERT (NOR) stages in green. (Some of the OR-INVERT stages are not explicit on the schematic and are empty boxes.)
The chip uses a few XOR gates (purple) to compute sums. Finally, there are a couple unique gates shown in yellow.
The schematic can be matched up with the labeled die image below. Conveniently, the layout of the die largely matches the schematic.
The AND-OR-INVERT gates make up the majority of the chip. Also notice the large chip real estate used for resistors.
The chip pins are labeled with blue text. (The metal layer was removed for this photo, to make the underlying circuitry more visible.)
Most of the 74181’s logic is implemented with
AND-OR-INVERT gates, which consist of AND gates connected to a NOR gate as shown below.
After seeing the inverter, you may expect that an AND-OR-INVERT gate is very complex.
But as the schematic below14 shows, the AND-OR-INVERT is not much more complex than an inverter, requiring just a few more transistors.
An AND gate is implemented by adding more emitters to the current-steering input transistor (red).
(This may seem very strange, but transistors with multiple emitters are common in TTL circuits.)
If all inputs are high, the base current will be steered to the collector. Otherwise, the base current will flow out the emitter. Thus, the AND of the inputs is generated.
The NOR gate is implemented by putting phase splitter transistors in parallel (orange). If any of the bases are high, the corresponding transistor (Q2A or Q2B) will conduct, pulling the output low.
While the circuit below has two AND gates, it can easily be extended to as many gates and inputs as desired.
The diagram below shows how these multiple-emitter transistors are implemented on the chip.
Three of these transistors are shown, each with four or five emitters (the dark squares), creating 4-input or 5-input AND gates. Each transistor’s base is at the top and each collector is at the bottom.
The signal lines run horizontally, with emitters connected as needed.
With this structure, multiple AND gates can arranged efficiently on the chip (similar to a Programmable Logic Array or PLA).
Note that the base resistors take up a significant amount of space.
The diagram below shows how the OR-INVERT part of the circuit appears on the chip. Note that Q2A and Q2B (orange) share a collector, so the two transistors don’t take up much space on the die.
Their inputs come from AND circuits such as the ones above.
3-input and 4-input OR gates are implemented similarly, by adding more transistors.
The chip uses a clever, compact circuit to compute XOR with two transistors
wired in an unusual way: the emitters and bases are tied together and there is no connection to ground.
The way it works is if the first input is high and the second is low, the first transistor turns on due to the base-emitter current. This pulls the output low through the transistor, with the second input acting as ground.
Likewise, if the first input is low and the second is high, the second transistor turns on and pulls the output low.
If both inputs are the same, there is no base-emitter current, both transistors remain off, and the output is pulled high by the resistor.
The output from the transistor pair goes to the standard inverter stage, so the resulting signal is the XOR of the two inputs.
As with OR-INVERT, the two transistors share a collector, making the layout more compact.
A few things to note about the photo.
The two transistors share a collector, which is equivalent to wiring their collectors together.
The pull-up resistor doesn’t appear in the photo; it is off to the right.
The inputs to the XOR are from AND-OR-INVERT gates; their output transistors are at the top of the photo.
The chip uses four AND gates that have one inverted input.17
On the die, it appears at first that the gates are implemented with the standard AND transistors, but an interesting trick is used to invert one of the inputs.
Transistor Q1 is wired in the normal current-steering way, with R1 providing a base current.
But transistor Q2 has its resistor connected to the collector, not the base.16
Normally R2 will pull the output high.
But if input X is high and input Y is low, R1’s current will go through Q1’s collector and Q2’s emitter, turning on Q2 and pulling the output low. Thus, the result after the inverter stage will be X AND NOT Y.
To create die photos, the integrated circuit package must be opened to expose the silicon die inside.
Most chips have an epoxy package, which can be dissolved in boiling sulfuric acid.
Since I don’t like boiling acid, I obtained the 74181 chip in a ceramic package, which is much easier to open.
I tapped the chip along the seam with a chisel, splitting the two layers apart.
Below, you can see how the metal pins are mounted between the layers, and are connected to the silicon die with tiny bond wires.
To photograph the die, I used a metallurgical microscope, a special type of microscope that shines light down through the lens to illuminate the chip from above.
I took 22 photographs and then used the Hugin stitching software to combine them into a high-resolution image (details). Then, I removed the metal layer from the chip with hydrochloric acid and took more images, resulting in the image below. Removing the metal makes it easier to see the structure of the silicon layer and determine how the chip works. (Click for high-resolution version.)
The 74181 ALU chip is a complex, high-performance TTL chip that was a key component in the processor of many minicomputers.
I took detailed die photos of the 74181 ALU that reveal how the chip works internally.
It uses several different logic gates, primarily AND-OR-INVERT gates that have an efficient layout on the chip.
These gates are implemented by extending an inverter circuit in different ways, but are more complex than their MOS equivalents.
I plan to explain how the 74181 implements its 32 functions and fast carry in a future article, so keep watching.
To understand what’s inside a TTL chip, it might be more sensible to start with a simple chip such as a NAND gate. But why take the easy way when there’s a complex chip to explore? ↩
Many of the 74181’s 32 functions are strange, but there is actually a system behind it.
Note that there are exactly 16 possible functions on two (one-bit) binary inputs A and B.
(There are 4 lines in the truth table, and two choices for each output, so 2^4 possible functions.)
The 74181’s 16 logic functions are simply these 16 functions (extended to 4 bits).
The 74181’s 16 arithmetic functions are A PLUS (one of the 16 possible functions of A and B) PLUS carry-in. ↩
Various sources say the 74181 has 61 or 75 gates. The schematic shows 67 gates. If you omit the five 1-input AND gates, you get 62 gates, i. On the die, I counted 169 transistors, but it’s quite possible I missed some. ↩
The history of the 74181 chip is described in detail on this site.
The 74181 is apparently the first ALU chip created. In 1968, Fairchild introduced the 3800, an 8-bit accumulator chip, but it didn’t have logical functions so technically it’s just an AU (Arithmetic Unit) not an ALU like the 74181.
Before the 74181 was the 7483 4-bit adder chip (1968);
internally, the 7483 is similar to the lower half of the 74181. The 7483 was used in minicomputers such as the PDP 8/E. ↩
ALU chips of this era didn’t perform multiplication or division, let alone floating point operations.
Multiplication and division operations were common in computers of that era, but were typically performed with multiple cycles of addition or subtraction. The one operation that seems missing from the 74181 is “shift right”; it can do a shift left with “A PLUS A”. ↩
When multiple 74181 chips are connected together for larger words, you can simply feed the carry-out of one chip into the carry-in of the next.
For higher performance, the 74182 look-ahead carry generator could be used to compute the carries across multiple chips in parallel.
Some minicomputers (such as the Xerox Alto) didn’t use the 74182, while others (such as the Interdata 7/16) did. ↩
I’ll give a brief overview of the chip’s implementation here.
The chip is build around the idea of carry lookahead.
In particular, the upper and-or-invert gates create the carry P (propagate) and G (generate) signals for each bit of A PLUS f(A,B).
The lower and-or-invert gates use these signals to compute the carry for each bit of the sum.
Finally, the xor gates add the P, G and carry to compute each final sum.
The point of this implementation is to compute the four bits in parallel and avoid a slow ripple carry.
In a later post I’ll explain this circuitry in full detail. ↩
I’ve simplified the discussion of the TTL logic circuit, since most people probably don’t care about saturation, β, biasing, and so forth.
If you want the full analysis, see Logic gates: the NOT gate or Transistor-Transistor Logic.
This presentation shows schematics for the different gates and TTL logic families. ↩
The inverter schematic is from the datasheet of the common 7404 inverter chip.
Interestingly, the basic circuit used in an inverter chip is almost identical to the circuit used inside the 74181.
This turns out to be true for most of the 74181 circuits—they are similar to individual TTL parts.
The 74181’s transistors are a bit smaller because not as much current is required inside the chip, but there is much
less scaling than you might expect. ↩
In the 74181’s inverter, R4 is not used. R1 takes its place. This is probably because an inverter in the chip doesn’t need to provide as much current as a 7404 inverter chip. ↩
The tricky part of the inverter circuit is that if Q2 turns on, there’s enough voltage to turn on Q4 but not Q3, thanks to diode D2.
The purpose of diode D2 isn’t to conduct current in one direction, like you’d expect from a diode.
Instead, its purpose is to raise Q3’s emitter voltage by one diode drop (about 0.7V). As a consequence, Q3 requires
0.7V more at the base to turn on. Thus, when Q2 is active, there is enough voltage to turn Q4 on, but not Q3.
And diode D1 simply protects the chip by shunting any negative input voltage to ground. ↩
The AND-OR-INVERT schematic is slightly modified from the 7451 AND-OR-INVERT chip to match the 74181’s circuit.
The 74181’s AND-OR-INVERT circuits in the lower half of the chip omit the pull-up output transistor found in the 7451 since the 74181 doesn’t require as much output current internally.
(The output diode remains to drop the phase splitter transistor’s collector voltage by one diode drop, or else the low output voltage will be too high.) ↩
On the die, Q2 appears to have two collectors. But these are just two contacts to the same collector, to simplify routing of the wiring. This is unlike the multiple-emitter transistors, which genuinely have multiple emitters. ↩
Some datasheets (example) show an XOR gate instead of NOT-AND.
You might wonder how this could possibly work since XOR and NOT-AND are different. The answer is that one of the four input combinations
never happens in the 74181, and the gates are equivalent across the other three inputs. The physical implementation is NOT-AND rather than XOR. ↩