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Reverse engineering the popular 555 timer chip (CMOS version)

Reverse engineering the popular 555 timer chip (CMOS version)
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Transistors inside the IC

Like most integrated circuits, the CMOS 555 timer chip is built from two types of transistors, PMOS and NMOS.
In contrast, the classic 555 timer uses the older technology of bipolar transistors (NPN and PNP).
CMOS is popular because it uses much less power than bipolar. CMOS transistors be packed into a chip very densely without overheating, which is why CMOS has ruled the microprocessor market since the 1980s. Although the 555 doesn’t require many transistors, low power consumption is still an advantage.

The diagram below shows an NMOS transistor in the chip, with a cross section below.
Since the transistor is built from overlapping layers, the die photo is a bit tricky to understand, but the cross section should help clarify it.
The different colors in the silicon indicate regions that has been doped to form N and P regions. The green rectangle is polysilicon, a layer above the silicon.
The whitish rectangle is the metal layer on top. The vias are connections between the layers.

The structure of an NMOS transistor in the LMC5555 CMOS timer chip.

The structure of an NMOS transistor in the LMC5555 CMOS timer chip.

A MOS transistor can be thought of as a switch that connects or disconnects the source and drain, based on the voltage on the gate.
The transistor consists of two rectangular strips of silicon that has been doped negative (N), embedded in the underlying P silicon.
The gate consists of a layer of conductive polysilicon above and between the drain and source. The gate is separated from the underlying silicon by a very thin layer of insulating oxide.
If voltage is applied to the gate, it produces an electric field that changes the properties of the silicon below the gate, allowing current to flow.[2]
The photo also shows the metal connection to the source, along with the “vias” that connect the silicon layer to the metal layer through the insulating oxide.[3]



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The second type of transistor is PMOS, shown below.
PMOS transistors are opposite to NMOS in many ways; they are called complementary, which is the C in CMOS.
PMOS uses a source and drain of P-doped silicon embedded in N-doped silicon.
The transistor is turned on by a low voltage on the gate (opposite to NMOS),
causing current to flow from the source to drain.
The metal connections to the source, gate, and drain are visible below, with circular vias to the underlying layers.
(Note that the diagram on the right is not a cross section, but a simplified “overhead” view.)
In the die photo, NMOS transistors are blue with a green gate, while PMOS transistors are pink with orange gates. These colors are created by interference due to the thickness of the layers, and saturation is enhanced in the photo.

Die photo of a PMOS transistor in the LMC555 timer. A simplified diagram of the transistor is on the right.

Die photo of a PMOS transistor in the LMC555 timer. A simplified diagram of the transistor is on the right.

The output transistors in the 555 are much larger than the other transistors and have a different structure in order to produce the high-current output. The photo below shows one of the output transistors. Note the zig-zag structure of the gate, between the source (outside) and drain (center). Also note that the metal layer for the drain is narrow on the right and widens as it exits the transistor in order to handle the increasing current.[4]

A large NMOS output transistor in the LMC555 CMOS timer chip.

A large NMOS output transistor in the LMC555 CMOS timer chip.

A variety of symbols are used to represent MOS transistors in schematics; the diagram below shows some of them. In this article, I use the highlighted symbols.

Various symbols used for MOS transistors. From Wikipedia.

Various symbols used for MOS transistors. Based on Wikipedia.
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